high density interconnect

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Published By: Mentor Graphics     Published Date: Sep 04, 2009
This paper looks at the issues, materials and current processes being researched to create this integrated Opto-Electronic Circuit Board by European, Japanese and North American organizations.
Tags : 
mentor graphics, high density interconnect (hdi), high speed applications, opto-electronics, photonics, pcbs, opto-electronic circuit board, eobc-optofoil, univ. of ulm, fraunhafer inst, daimler-chrysler, siemens, truemode, terahertz, polyguide, dupont, topcat, nist, goodyear, jiep
    
Mentor Graphics
Published By: Mentor Graphics     Published Date: Apr 03, 2009
A powerful signal integrity analysis tool must be flexibility, easy to use and integrated into an existing EDA framework and design flow. In addition, it is important for the tool to be accurate enough. This report reviews a validation study for the Mentor Graphics HyperLynx 8.0 PI tool to establish confidence in using it for power integrity analysis.
Tags : 
mentor graphics, pdn simulation, eda framework, mentor hyperlynx 8.0 pi, integrity analysis, virtual prototypes, esr, capacitor, power distribution network, vrm, voltage regulator module, signal, smas, analog models, backward crosstalk, capacitive crosstalk, controlling crosstalk, correct emc problems, correct emi problems, cross talk
    
Mentor Graphics
Published By: Mentor Graphics     Published Date: Apr 03, 2009
For advanced signaling over high-loss channels, designs today are using equalization and several new measurement methods to evaluate the performance of the link. Both simulation and measurement tools support equalization and the new measurement methods, but correlation of results throughout the design flow is unclear. In this paper a high performance equalizing serial data link is measured and the performance is compared to that predicted by simulation. Then, the differences between simulation and measurements are discussed as well as methods to correlate the two.
Tags : 
mentor graphics, equalized serial data links, design flow, high loss channels, tektronix, pcb, bit error rate, ber, ieee, serdes, simulation, system configuration, mentor graphics hyperlynx, simplified symmetric trapezoidal input, duty cycle distortion, ber contours, electronics, analog models, backward crosstalk, capacitive crosstalk
    
Mentor Graphics
Published By: Mentor Graphics     Published Date: Apr 03, 2009
High Density Interconnect (HDI) is being used more often to meet the growing need for more complex designs in smaller form factors. Beyond some of the more obvious electrical effects of using smaller vias, there is also an impact to the power integrity of a board using HDI. This includes different effects of mounted inductances of decoupling capacitors, changes in plane performance due to reduction in perforation from chip pinouts, and the inherent plane-capacitance changes from using dielectrics of various thicknesses. This paper will examine and quantify these effects, using numerous design examples, including a large conventional through-hole design board that was reduced using HDI.
Tags : 
power integrity effects, mentor graphics, high density interconnect, hdi, chip pinouts, perforation, multilayer or build-up multilayer, bum, sequential build-up technologies, sbu, buried via holes, bvhs, dielectric materials, photosensitive, laser drilling, plasma drilling, microvia, plated through-holes, pths, power distribution network
    
Mentor Graphics
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